The invention relates generally to integrated circuit fabrication processes and manufacturing methods and more particularly to copper metallization techniques used in the formation of conductive interconnections in integrated circuits.
The use of copper for interconnects in integrated circuits is an important field of research for integrated circuit manufacturers. As individual features on integrated circuits (ICs) become smaller, the size of metallized interconnects (lines, vias, etc.) also shrinks. The reduced size of interconnects can create unacceptable resistance in aluminum or tungsten conductors which increases impedance and propagation delays and can limit microprocessor clock speeds. Aluminum also is susceptible to electromigration which, in very fine (i.e., small cross-section) conductors, can cause discontinuities which produce device failure. Copper's greater conductivity, when compared with aluminum, tungsten, or other conductive materials used in ICs, is an important advantage. Copper also has greater resistance to electromigration. Both factors are important to manufacturers of ultra-large-scale-integration (ULSI) IC circuits, which is why copper is the subject of intensive research. The conductivity of copper is approximately twice that of aluminum and over three times that of tungsten. Copper thus is clearly advantageous for use in devices with ever-smaller geometries. With respect to electromigration, copper is approximately ten times better than aluminum, meaning that copper will better maintain electrical integrity.
A principle disadvantage of copper, presenting numerous processing problems for IC manufacturers, is its polluting effect on semiconductor materials. When copper comes in contact with semiconductor material it changes the semiconductor characteristics and destroys active circuit devices. A solution to this problem is to deposit a diffusion barrier material on the IC in regions where contact with copper metal must be avoided. The barrier material blocks the migration of copper into critical semiconductor regions while permitting electrical communication between the copper and the regions of the IC underlying the barrier material. TiN and TaN are examples of well-known and widely used diffusion barrier materials employed in IC copper metallization processes.
But diffusion barriers present another problem associated with copper metallization, copper adheres poorly to diffusion barrier materials. One prior art approach to adhering copper to diffusion barrier materials is to deposit the copper by means of physical vapor deposition (PVD), alternatively referred to as sputtering. PVD involves directing metallic copper onto a target surface. PVD improves adhesion between deposited copper and the barrier material, but copper deposited by PVD exhibits poor conformality with surface features such as steps and high-aspect-ratio vias and trenches.
An alternative copper deposition process is chemical vapor deposition (CVD). In CVD, copper is combined with a ligand, or organic compound (the combination is called a copper precursor), and volatilized. The IC wafer or substrate, coated with diffusion barrier material, is heated and exposed to the precursor which decomposes when it strikes the copper-receiving surface. The heat drives off the organic material and leaves copper behind. Copper applied by conventional prior art CVD processes has greater conformality to surface features than copper deposited by PVD. But for most precursors, CVD adheres poorly to diffusion barrier materials.
Various techniques and been devised to improve the adhesion of CVD copper to barrier material. A typical approach is to apply CVD copper immediately after the deposition of the diffusion barrier material. It has generally been thought that the copper layer has the best chance of adhering to the diffusion barrier material when the diffusion barrier material surface is clean. Hence, the diffusion barrier surface is often kept in a vacuum, or controlled environment, and the copper is deposited on the diffusion barrier as quickly as possible. However, even when copper is immediately applied to the diffusion barrier surface, problems remain in keeping the copper properly adhered. A complete understanding of why copper does not always adhere directly to a diffusion barrier surface is lacking.
Despite the large amount of effort that has been expended on CVD, two major obstacles remain before a CVD copper process can be adopted in manufacturing. These two critical hurdles are (i) high cost of ownership (COO) for the CVD process and (ii) reliable adhesion to barriers. The presently available MOCVD processes and precursors do not satisfactorily fulfill both these criteria simultaneously without compromising film and process attributes. Since the precursor cost is a major contributor (&gt;65%) to the overall COO of the CVD process, precursors that can be inexpensively manufactured are preferred. However, precursor costs have to be lowered without compromising film properties. For instance, reliable and repeatable adhesion has to be achieved while simultaneously maintaining low via and contact resistance, high deposition rate, high conformality, as well as low cost of the precursor. Many IC manufacturers have employed a PVD Cu seed layer followed by a CVD Cu fill in order to achieve adequate film properties. The use of a PVD Cu seed layer underscores the difficulty in achieving low contact resistance and reliable adhesion on barriers (TiN or TaN) by a CVD process alone.
As the size of features on ICs continues to shrink, it is desirable to continue developing improvements in the adhesion of CVD copper to barrier materials as a replacement for PVD, which is unsuitable for metallizing the smallest features.
The poor adhesion between copper and diffusion barrier materials has limited the use of electrochemical deposition techniques, such as electroplating and electroless plating, for depositing copper on ICs. Electro-chemical deposition, in which copper is chemically deposited on exposed surfaces through electro-chemical reactions, galvanic deposition, or electroplating, is a cost-effective process for depositing relatively thick (e.g., 1-micron or greater) layers of bulk copper on surfaces. But because copper can be effectively deposited electro-chemically only on copper surfaces, the process requires an initial "seed" layer of copper on the target surface for effective adhesion. In other words, electrochemical deposition is a 2-step process. A seed layer of copper is first deposited on the diffusion barrier material and the electro-chemically deposited copper is then applied to any desired thickness. To ensure good adhesion to the diffusion barrier material, prior art electro-chemically copper deposition methods generally employ PVD (sputtered) copper as the seed layer. But the PVD seed layer will have the usual problem of poor conformality in high-aspect-ratio features. Since electro-chemically deposited copper will only adhere to copper previously deposited, uniformity requires that all features receive at least some coating of the seed layer. Discontinuities and poor conformance is a particular problem at the bottom of vias and trenches and other high-aspect-ratio features. Thus, electro-chemical deposition becomes increasingly difficult to use as the size of individual features decreases, as long as the seed layer of copper is applied by PVD.
It would be advantageous to provide a method of improving the adherence of copper metallization to diffusion barrier material without the sacrifice in conformality associated with PVD copper.
It would also be advantageous to provide a method of depositing copper on diffusion barrier material using chemical vapor deposition (CVD) to improve conformality, while also improving the adhesion between the copper and the barrier material.
In addition, it would be advantageous to discover a method of adhering a thin seed layer of copper to the surface of diffusion barrier material using high conformality CVD, wherein the thin seed layer serves as a receiving surface for the deposition of additional copper by a technique which is cost effective, such as electro-chemical deposition, wherein the additional copper adheres strongly to the seed layer of copper through copper-to-copper bonds.
Accordingly, a method is provided for use in integrated circuit manufacturing for applying copper to selected copper-receiving surfaces of an integrated circuit substrate. The method comprises steps which include positioning the integrated circuit substrate in a chemical vapor deposition (CVD) chamber. In the CVD chamber, a first adhering conforming layer of copper is deposited on the copper receiving surfaces by means of chemical vapor deposition using (hfac)Cu(1,5-Dimethylcyclooctadiene) precursor. The first layer of copper conforms and adheres to the copper-receiving surface and provides a copper seed layer to which subsequently-deposited copper will adhere. And then a second layer of copper is deposited on the first layer of copper by means of electro-chemical deposition. The substrate is positioned in an electro-chemical deposition apparatus and additional copper is deposited on the first adhering conforming layer of copper. The second layer of copper is deposited by means of electro-chemical deposition until a predetermined thickness of copper is formed on each copper-receiving surface.
A suitable final thickness for the first adhering conforming layer of copper deposited in the CVD step is a maximum of 1000 angstroms, with a suggested thickness range being generally in the range of 50 to 480 angstroms and a preferred thickness generally in the range of 100 angstroms to 200 angstroms.
In a first alternative embodiment of the present invention, the second layer of copper, deposited during the electro-chemical deposition of copper step, is preferably deposited on the first layer by means of electroplating. That is, copper is deposited onto the first adhering conforming layer in an electrolytic bath by galvanic action.
A second alternative embodiment of the present invention is to deposit the second layer onto the first layer by means of electroless plating. In electroless plating the substrate, with the first adhering conforming layer deposited thereon, is immersed in an electroless copper plating bath containing a cupric salt and a reducing agent. Additional copper is deposited on the first layer, forming the second layer.
In both the first and second alternative embodiments of the present invention, the deposition of the second layer of copper by electro-chemical deposition is carried out until the second layer reaches any desired thickness, preferably filling any voids, vias, and channels into which copper conductors are to be formed.
The copper-receiving surfaces of an integrated circuit on which copper is deposited in accordance with the present invention will generally be diffusion barrier material applied to the integrated circuit substrate. Accordingly, another alternative embodiment of the present invention preferably includes the preliminary step of depositing diffusion barrier material on the integrated circuit to form the copper-receiving surfaces on which the above-described method is practiced. The step of depositing diffusion barrier material includes depositing material selected from the group consisting of TiN, TiON, TiSiN, Ta, TaSiN, TaN, TiW, TiWN, Mo, WN, and WSIN.